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w wm8725 99db stereo dac wolfson microelectronics plc to receive regular email updates, sign up at http://www.wolfsonmicro.com/enews production data, february 2012, rev 4.3 copyright ? 2012 wolfson microelectronics plc . description wm8725 is a high-performance stereo dac designed for use in portable audio equipment, video cd players and similar applications. it comprises selectable normal or i 2 s compatible serial data interfaces for 16 to 24-bit digital inputs, high performance digital filters, and sigma-delta output dacs, achieving an excellent 99db signal-to-noise performance. the device is available in a 14-lead soic package that offers selectable mute and de-emphasis functions using a minimum of external components. features ? 99db snr performance ? stereo dac with input sampling from 8khz to 96khz ? additional mute feature ? normal or i 2 s compatible data format ? sigma-delta design with 64x oversampling ? system clock 256fs or 384fs ? supply range 3v to 5v ? 14-lead soic package applications ? portable audio equipment ? video cd players block diagram
wm8725 production data w pd, rev 4.3, february 2012 2 table of contents description ................................................................................................................ 1 ? features ..................................................................................................................... 1 ? applications .............................................................................................................. 1 ? block diagram ......................................................................................................... 1 ? table of contents .................................................................................................. 2 ? pin configuration ................................................................................................... 3 ? ordering information ........................................................................................... 3 ? absolute maximum ratings ................................................................................. 4 ? recommended operating conditions .............................................................. 4 ? electrical characteristics .............................................................................. 5 ? pin description ......................................................................................................... 6 ? internal power on reset ............................................................................................... 6 ? device description ................................................................................................. 8 ? introduction .................................................................................................................. ..... 8 ? dac circuits .................................................................................................................. ....... 8 ? serial data interface ...................................................................................................... 9 ? system clock .................................................................................................................. ... 10 ? recommended external components ........................................................... 11 ? detail of recommended external components showing the external low pass filter ................................................................................................................. 11 ? pcb layout .................................................................................................................... ...... 11 ? package dimensions ............................................................................................. 12 ? address: ...................................................................................................................... ........ 13 ? revision history .................................................................................................... 14 ?
wm8725 production data w pd ,rev 4.3, february 2012 3 pin configuration 10 9 8 14 13 12 11 wm8725 5 6 7 1 2 3 4 vdd voutl mute nc deemph scki format gnd voutr cap nc bckin lrcin din ordering information device temperature range package moisture sensitivity level peak body temperature WM8725CGED -40 o c to +85 o c 14-lead soic (lead free) msl1 260 o c WM8725CGED/r -40 o c to +85 o c 14-lead soic (pb-free, tape and reel) msl1 260 o c note: reel quantity: 3,000
wm8725 production data w pd, rev 4.3, february 2012 4 absolute maximum ratings absolute maximum ratings are stress ratings only. perm anent damage to the device may be caused by continuously operating at or beyond these limits. device functional operating limits and guaranteed performance specifications are given under electri cal characteristics at the test conditions specified. esd sensitive device. this device is manufactured on a cmos process. it is therefore generically susceptible to damage from excessive static voltages. proper esd precautions must be taken during handling and storage of this device. wolfson tests its package types according to ipc/jedec j-std-020b for moisture sensitivity to determine acceptable storage conditions prior to surface mount assembly. these levels are: msl1 = unlimited floor life at <30 ? c / 85% relative humidity. not normally stored in moisture barrier bag. msl2 = out of bag storage for 1 year at <30 ? c / 60% relative humidity. supplied in moisture barrier bag. msl3 = out of bag storage for 168 hours at <30 ? c / 60% relative humidity. supplied in moisture barrier bag. the moisture sensitivity level for each package type is specified in ordering information. condition min max supply voltage -0.3v +7.0v reference input vcc+0.3v operating temperature range, t a -40 o c +85 o c storage temperature -65 o c +150 o c lead temperature (soldering, 10 seconds) +240 o c lead temperature (soldering, 2 minutes) +183 o c recommended operating conditions parameter symbol test conditions min typ max unit supply range vdd -10% 3.0 to 5.0 +10% v ground gnd 0 v supply current vdd = 5v 15 25 ma vdd = 3v 7.5 ma
wm8725 production data w pd ,rev 4.3, february 2012 5 electrical characteristics test conditions v dd = 5v, gnd = 0v, t a = +25 o c, fs = 48khz, scki = 256fs unless otherwise stated. parameter symbol test conditions min typ max unit digital logic levels input low level v il 0.8 v input high level v ih 2.0 v analogue output levels load resistance to midrail or ac coupled (5v supply) 1 k ? to midrail or ac coupled (3v supply) 1 k ? maximum capacitance load 5v or 3v 100 pf output dc level v dd /2 v reference levels potential divider resistance v dd to cap and cap to gnd 80 100 120 k ? voltage at cap vdd = 5v 2.3 2.5 2.7 v dac circuit specifications snr (note 1) vdd = 5v 90 99 db vdd = 3v 97 db full scale output voltage into 10kohm vdd = 5v, 0db 0.9 1.0 1.1 v rms into 10kohm vdd = 3v, 0db 0.6 v rms thd (full scale) 0db 0.01 0.02 % thd+n (dynamic range) -60db 92 db frequency response 0 20,000 hz transition band 20,000 hz out of band rejection -40 db channel separation 90 db gain mismatch channel-to-channel 1 5 %fsr audio data input and system clock timing information bckin pulse cycle time t bcy 100 ns bckin pulse width high t bch 50 ns bckin pulse width low t bcl 50 ns bckin rising edge to lrcin edge t bl 30 ns lrcin rising edge to bckin rising edge t lb 30 ns din setup time t ds 30 ns din hold time t dh 30 ns system clock pulse width high t sckih 13 ns system clock pulse width low t sckil 13 ns notes: 1. ratio of output level with 1khz full scale input, to the output level with all zeros into the digital input, measured ?a? weighted over a 20hz to 20khz bandwidth. 2. all performance measurements done with 20khz low pass filter. failure to use such a filter will result in higher thd+n and lower snr and dynamic range readings than are found in the electrical characteristics. the low pass filter removes out of band noise; although it is not audible, it may affect dynamic specification values.
wm8725 production data w pd, rev 4.3, february 2012 6 pin description pin name type description 1 lrcin digital input sample rate clock input 2 din digital input serial data input 3 bckin digital input bit clock input 4 nc no connect no internal connection 5 cap analogue output analogue internal reference 6 voutr analogue output right channel dac output 7 gnd supply 0v supply 8 vdd supply positive supply 9 voutl analogue output left channel dac output 10 mute digital input mute control, high = muted. internal pull-down 11 nc no connect no internal connection 12 deemph digital input de-emphasis select, high = de-emphasis on. internal pull-up 13 format digital input data input format select, low = normal, high = i 2 s. internal pull-up 14 scki digital input system clock input (256fs or 384fs) internal power on reset the wm8725 includes an internal power-on reset circuit. this is shown in figure 1.this reset circuit is used to reset the digital logic into a default state after power up. figure 1 internal power on reset circuit the timing of the power on reset is shown in figure 2 the circuit monitors vdd and vmid (cap pin) and asserts porb low when vmid is below the minimum threshold vpor. it is assumed that vmid will rise slower than vcc due to the capacitor on vmid.
wm8725 production data w pd ,rev 4.3, february 2012 7 figure 2 power on/off reset timing symbol min typ max unit vpor 0.85 1.0 1.2 v vpor_off 2.25 2.5 2.75 v table 1 power on/off reset timing at power on, when vdd and vmid have been established, porb is released and the wm8725 has been reset. at power down, porb is asserted low whenever vmid drops below the minimum threshold of vpor_off. if vdd is removed at any time, the internal power-on reset circuit is powered down and porb will follow vdd.
wm8725 production data w pd, rev 4.3, february 2012 8 device description introduction wm8725 is a complete stereo audio 16-24 bit digital-to-analogue converter, including digital interpolation filter, multibit sigma-delta with di ther, and switched capacitor multibit stereo dac and output smoothing filters. special functions of mute and de-emphasis are pr ovided, and operation using system clock of 256fs or 384fs is provided, selection between either clock rate being automatically controlled. sample rates (fs) from less than 8ks/s to 96ks/s are allowed, provided the appropriate system clock is input. mute description 0 mute is off 1 mute is on table 2 mute control a novel multi bit sigma-delta dac design is used, utilising a 64x oversampling rate, to optimise signal to noise performance and offer increased clock jitter tolerance. internally generated midrail references are used to dc bias output signals, requiring only a single external capacitor for decoupling purposes. single 3v to 5v supplies may be used, the output amplitude scaling with absolute supply level. low supply voltage operation and low current consumption, and the low pin count small package, make the wm8725 attractive for many consumer type applications. dac circuits the wm8725 dacs are designed to allow playback of 16-bit pcm audio or similar data with high resolution and low noise and distortion. sample rates up to 96ks/s may be used, with much lower sample rates acceptable provided that the ratio of sample rate (lrcin) to system clock is maintained at the required 256fs or 384fs times. the dacs on wm8725 are implemented using sigma-delta oversampled conversion techniques. these require that the pcm samples are digitally filtered and interpolated to generate a set of samples at a much higher rate than the 96ks/s input rate. this sample stream is then digitally modulated to generate a digital pulse stream that is then converted to analogue signals in a switched capacitor dac. the advantage of this technique is that the dac is linearised using noise shaping techniques, allowing the full performance to be met using non-critical analogue components. a further advantage is that the high sample rate at the dac output means that smoothing filters on the output of the dac need only have fairly crude characteristics in order to remove the characteristic steps, or images, on the output of the dac. to ensure that generation of tones characteristic to sigma-delta convertors is not a problem, dithering is used in the digital modul ator and a higher order modulator is used. the switched capacitor technique used in the dac reduces sensitivity to clock jitter compared to switched current techniques used in other implementations. de-emphasis of 44.1khz signals may be applied if required. deemph description 0 de-emphasis is off 1 de-emphasis is on table 3 de-emphasis control the voltage on the cap pin is used as the reference for the dacs, therefore the amplitude of the signals at the dac outputs will scale with the amplitude of the voltage at the cap. an external reference could be used to drive into the cap pin if desired, but a value typically of about midrail should be used for optimum performance.
wm8725 production data w pd ,rev 4.3, february 2012 9 the outputs of the 2 dacs are buffered out of the device by buffer amplifiers. these amplifiers will source load current of several ma and sink current up to 1.5ma, so allowing significant loads to be driven. the output source is active and the sink is class a, i.e. fixed value, so greater loads might be driven if an external ?pull-down? resistor is connected at the output. typically an external low pass filter circuit will be used to remove residual sampling noise of the 64x oversampling used and if desired adjust the signal amplitude and device strength. serial data interface wm8725 has serial interface formats that are fully compatible with both normal (msb first, 16 bit right-justified) and i 2 s interfaces. the data format is selected with the format pin. when format is low, normal data format is selected. when the format is high, i 2 s format is selected. it must be noted that in ?packed? mode operation (exactly 32 bclks per lrcin period), the data word must align exactly with lrcin clock edges (effectively both left and right justified at the same time). this is true in both normal and i 2 s modes. format description 0 normal format (msb-first, 16 bit right justified) 1 i 2 s format (philips serial data protocol) table 4 serial interface formats msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 16-bit 1/fs 123 1415 16 1 2 3 14 15 16 figure 3 'normal' data input timing msb msb lsb lsb left channel right channel lrcin bckin din audio data word = 16-bit 1/fs 1 2 3 14 15 16 1 2 314 15 16 figure 4 i2s data input timing
wm8725 production data w pd, rev 4.3, february 2012 10 system clock the system clock is used to operate the digital filters and the noise shaping circuits. the system clock input is at pin 14 (scki). the frequency of wm8725?s system clock should be set to 256fs or 384fs, (where fs is the audio sampling frequency). the sample rate is typically: 32 khz, 44.1 khz, 48 khz or 96khz. wm8725 has a system clock detection circuit that automatically determines whether the system clock being supplied is at 256fs or 384fs. the system clock should be synchronised with lrcin, but wm8725 is tolerant of phase differences. severe distortion in the phase difference between lrcin and the system clock will be detected, and cause the device to automatically resynchronise. during resynchr onisation, the output of the device will either repeat the previous sample, or drop the next sample, depending on the nature of the phase slip. this will ensure minimal ?click? at the analogue outputs during resynchronisation. scki t sckil t sckih figure 5 system clock timing requirements sampling rate (lrcin) system clock frequency (mhz) 256fs 384fs 32 khz 8.192 12.288 44.1 khz 11.2896 16.9340 48 khz 12.288 18.432 96khz 24.576 1 36.864 1 table 5 system clock frequencies versus sampling rate notes: 1 96khz sample rate at either 256fs or 384fs are only supported with 5v supplies. lrcin bckin din t bch t bcl t lb t bl t bcy t ds t dh figure 6 audio data input timing
wm8725 production data w pd ,rev 4.3, february 2012 11 recommended external components gnd voutr cap vdd nc bckin lrcin din 5 6 7 1 2 3 4 10 9 8 14 13 12 11 voutl mute nc deemph scki format wm8725 gnd vdd analogue output for right channel from audio processor analogue output for left channel 256fs/384fs clk 10f 0.1f 10f + external lpf external lpf figure 7 recommended external components detail of recommended external components show ing the external low pass filter external lpf x2 for stereo operation 100pf - + 10k ? 1500pf 10k ? 680pf 10k ? filtered analogue output voutr voutl figure 8 third-order low pass filter (lpf) example an external low pass filter is recommended (see figure 8) if the device is driving a wideband amplifier. in some applications, second-order or passive rc filter may be adequate. pcb layout 1. place all supply decoupling capacitors as cl ose as possible to their respective supply pins and provide a low impedance path from the capacitors to the appropriate ground. 2. separate analogue and digital ground planes should be situated under respective analogue and digital device pins. 3. avoid noise on the cap reference pin. the decoupling capacitor should be placed as close to this pin as possible with a low impedance path from the capacitor to analogue ground. 4. digital input signals should be screened from each other and from other sources of noise to avoid cross-talk and interference. they should also run over the digital ground plane to avoid introducing unwanted noise into the analogue ground plane. 5. analogue output signal tracks should be kept as short as possible and over the analogue ground plane reducing the possibility of losing signal quality.
wm8725 production data w pd, rev 4.3, february 2012 12 package dimensions notes: a. all linear dimensions are in millimeters (inches). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0.25mm (0.010in). d. meets jedec.95 ms-012, variation = ab. refer to this specification for further details. symbols dimensions (mm) dimensions (inches) min max min max a 1.35 1.75 0.0532 0.0688 a1 0.10 0.25 0.0040 0.0098 b 0.33 0.51 0.0130 0.0200 c 0.19 0.25 0.0075 0.0098 d 8.55 8.75 0.3367 0.3444 e 3.80 4.00 0.1497 0.1574 e 1.27 bsc 0.05 bsc h 5.80 6.20 0.2284 0.2440 h 0.25 0.50 0.0099 0.0196 l 0.40 1.27 0.0160 0.0500 ? 0 o 8 o 0 o 8 o ref: jedec.95, ms-012 0.10 (0.004) seating plane dm001.c e d: 14 pin soic 3.9mm wide body h b d a a1 c h x 45 o -c- 8 7 1 14 ? l e
wm8725 production data w pd ,rev 4.3, february 2012 13 important notice wolfson microelectronics plc (?wolfson?) products and services are sold subject to wolfson?s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. wolfson warrants performance of its products to the specific ations in effect at the date of shipment. wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. customers should therefore obtain the latest version of relevant informati on from wolfson to verify that the information is current. testing and other quality control techniques are utilised to the extent wolfson deems necessary to support its warranty. specific testing of all parameters of each device is not nece ssarily performed unless required by law or regulation. in order to minimise risks associated with customer applications, the customer must use adequate design and operating safeguards to minimise inherent or procedural hazards. wolfs on is not liable for applications assistance or customer product design. the customer is solely responsible for its selection and use of wolfson products. wolfson is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a wolfson product. wolfson?s products are not intended for use in life support sy stems, appliances, nuclear systems or systems where malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. any use of products by the customer for such purposes is at the customer?s own risk. wolfson does not grant any licence (express or implied) under any patent right, copyright, mask work right or other intellectual property right of wolfson covering or relating to any combination, machine, or process in which its products or services might be or are used. any provision or publication of any third party?s products or services does not constitute wolfson?s approval, licence, warranty or endorsement thereof. any third party trade marks contained in this document belong to the respective third party owner. reproduction of information from wolfson datasheets is per missible only if reproduction is without alteration and is accompanied by all associated copyright, proprietary and other noti ces (including this notice) and conditions. wolfson is not liable for any unauthorised alteration of such information or for any reliance placed thereon. any representations made, warranties given, and/or liabilities accepted by any person which differ from those contained in this datasheet or in wolfson?s standard terms and conditions of sale, delivery and payment are made, given and/or accepted at that person?s own risk. wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. address: wolfson microelectronics plc westfield house 26 westfield road edinburgh eh11 2qb united kingdom tel :: +44 (0)131 272 7000 fax :: +44 (0)131 272 7001 email :: sales@wolfsonmicro.com
wm8725 production data w pd, rev 4.3, february 2012 14 revision history date rev originator changes 20/02/12 4.3 jmacd order codes updated from wm8725ged/v and wm8725ged/rv to wm8725 c ged and wm8725 c ged/r to reflect change to copper wire bonding. 20/02/12 4.3 jmacd msl changed from msl2 to msl1. 01/02/12 4.3 jmacd operating temp changed to -40 o c to +85 o c

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